RIP ROP: Intel's cunning plot to kill stack-hopping exploits at CPU level

The place for technology related posts.

Moderator: Moderators

Post Reply
User avatar
Sabre
DCAWD Founding Member
Posts: 21389
Joined: Wed Aug 11, 2004 8:00 pm
Location: Springfield, VA
Contact:

RIP ROP: Intel's cunning plot to kill stack-hopping exploits at CPU level

Post by Sabre » Fri Jun 17, 2016 4:16 pm


Intel is pushing a neat technique that could block malware infections on computers at the processor level.

That's the 40,000ft view of the new safety mechanism, the details of which were published on Thursday. What's really going on is this: Intel's so-called Control-flow Enforcement Technology (CET) [PDF] attempts to thwart exploit code that uses return-orientated programming (ROP) and jump-orientated programming (JOP).

CET works by introducing a shadow stack – which only contains return addresses, is held in system RAM, and is protected by the CPU's memory management unit. When a subroutine is called, the return address is stashed on the thread's stack, as per normal, and also in the shadow stack. When the processor reaches a return instruction, the processor ensures the return address on the thread stack matches the address on the shadow stack.

If they don't match, then an exception is raised, allowing the operating system to catch and stop execution. Therefore, if exploit code starts tampering with the stack to chain together malicious instructions to install malware or otherwise compromise a system, these alterations will be detected and the infiltration halted before any damage can be done.

The shadow stack must sit in memory that has a new shadow stack bit set in the page tables. Any attempts by software to access the shadow stack – such as with a MOV instruction – are blocked by the memory management unit and a page fault raised to alert the operating system that shenanigans are afoot. Any attempt to use a control-flow instruction – such as RET – when the shadow stack is not marked as a shadow stack in the page tables will also raise a page fault.

The shadow stack pointer (SSP) for the running thread is stored in the Task state segment. There are various control registers that hold SSPs for privilege rings 0 to 2 (non-usermode rings) and for interrupts. You should really read the above PDF if you're interested in the detail – this is really only scratching the surface.

...
I love that they are looking at more and more ways to protect people. This stuff is pretty cool!
Sabre (Julian)
Image
92.5% Stock 04 STI
Good choice putting $4,000 rims on your 1990 Honda Civic. That's like Betty White going out and getting her tits done.

Post Reply